Silic SoC

Macnica Group introduced the mass production version of Silic SoC module in August 2018. This is a plug-and-play SoC module. Customer would focus on the development of application and custom logic only. Development input is reduced and development cycle is shortened. Macnica Group could provide hardware and FPGA reference logic, Linux driver/ BSP development with the module. Also, provide customized module with the main chip or memory options.

Arria 10 SOC module solution-Silic.jpg

Standard Module Specifications

⦁ Main Device
⦁ Intel Arria 10 SoC, logical volumn: 270-660KLE
⦁ Dual core 1.5GHz ARM Cortex-A9

⦁ Memory
⦁ Processor side: 4GB DDR4 with ECC @40bit, 5pcs
⦁ FPGA side: 8GB DDR4 with ECC @72bit,9pcs
⦁ 128MB SLC NAND Flash,128MB SPINOR Flash

⦁ I/O Interface
⦁ 24 pairs of High-speed transceivers, maximum rate: 14.2Gbps
⦁ LVDS – 12 pairs (10AS027), 48 pairs (10AS048)
⦁ FPGA GPIO – 60(10AS027), 101(10AS048)
⦁ Processor Peripherals: EMAC x1, USB (和SD/MMC共享) x1, I2Cx2, UARTx1, GPIOx1

⦁ Others
⦁ EEPROM – I2C, 512Kb, Temperature Sensor – I2C,Encryption – I2C, DS28C22Q, Watchdog -- MAX6746

⦁ Power Supply
⦁ 5V single supply
⦁ On board generated 3.3V,2.5V,1.8V(IO),1.2V(DDR4),1.0V(GXB), 0.9V (core voltage)

⦁ Mechanical structure
⦁ Size: 120mm x 74.2mm
⦁ 18 layers PCB
⦁ Connector: Samtec ST5 series, 160 pins, x2(10AS027)/x3(10AS048), support 20Gbps transmission rate

⦁ Software Support
⦁ Quartus II reference project and Uboot
⦁ Linux version: Linux-4.1.22-ltsi
⦁ Default SMP mode, can support AMP mode
⦁ File system: JFFS2 on NAND Flash

Silic SOC Module System Diagram

Arria 10 SOC module structure diagram.jpg

Standard Module Purchasing Code and Parameter

Purchasing code: CYTSILIC-48H3E2-FF1JR

⦁ FPGA: 10AS048H3F34E2SG
⦁ 24 pairs of XCVR high-speed transceivers: 14.2Gbps
⦁ Temperature range: 0°C ~ 100°C
⦁ FPGA speed grade: -2
⦁ HPS DDR4: 4GB with ECC
⦁ FPGA DDR4: 8GB with ECC
⦁ NAND: 128MB
⦁ QSPI Flash: 128MB

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